+- +-
Say hello if visiting :) by Gecko
11 Jan 2023, 07:43:05 pm

Seti is down again by Mike
09 Aug 2017, 10:02:44 am

Some considerations regarding OpenCL MultiBeam app tuning from algorithm view by Raistmer
11 Dec 2016, 06:30:56 am

Loading APU to the limit: performance considerations by Mike
05 Nov 2016, 06:49:26 am

Better sleep on Windows - new round by Raistmer
26 Aug 2016, 02:02:31 pm

Author Topic: SETI @ Home on an FPGA?  (Read 11599 times)

Bluesilvergreen

  • Guest
SETI @ Home on an FPGA?
« on: 17 Mar 2007, 08:15:53 am »
Hi!

This is just an idea that came to my mind:

I thought about creating vhdl-code for an FPGA (like Xilinx or Altera) that will do the whole crunching or parts of it.
I don't know if the advantage of parallel computing can make up the disadvantage of low clock speed and if there are enough
gates on an FPGA (for example: 5 million gates on a Xilinx Spartan 3 3S5000:
http://www.xilinx.com/products/silicon_solutions/fpgas/spartan_series/spartan3_fpgas/overview.htm)

For writing the vhdl-code I found this: http://mesl.ucsd.edu/spark/

This would be a hardware-SETI-cruncher like a hardware MPEG-Decoder.

What do you think about this?
Is this possible

Offline Simon

  • Ni!
  • Knight who says 'Ni!'
  • *****
  • Posts: 1045
    • Is it a bird? Is it a plane? No...its-the.net!
Re: SETI @ Home on an FPGA?
« Reply #1 on: 19 Mar 2007, 08:26:01 am »
Hi,

I definitely think it's possible, but the development cost may be prohibitive.

For fun, look at this system that was just announced (relies on Xilinx FPGAs):

http://www.theinquirer.net/default.aspx?article=38324

Regards,
Simon.

 

Welcome, Guest.
Please login or register.
 
 
 
Forgot your password?
Members
Total Members: 97
Latest: ToeBee
New This Month: 0
New This Week: 0
New Today: 0
Stats
Total Posts: 59559
Total Topics: 1672
Most Online Today: 40
Most Online Ever: 983
(20 Jan 2020, 03:17:55 pm)
Users Online
Members: 0
Guests: 34
Total: 34
Powered by EzPortal