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SETI @ Home on an FPGA?

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Bluesilvergreen:
Hi!

This is just an idea that came to my mind:

I thought about creating vhdl-code for an FPGA (like Xilinx or Altera) that will do the whole crunching or parts of it.
I don't know if the advantage of parallel computing can make up the disadvantage of low clock speed and if there are enough
gates on an FPGA (for example: 5 million gates on a Xilinx Spartan 3 3S5000:
http://www.xilinx.com/products/silicon_solutions/fpgas/spartan_series/spartan3_fpgas/overview.htm)

For writing the vhdl-code I found this: http://mesl.ucsd.edu/spark/

This would be a hardware-SETI-cruncher like a hardware MPEG-Decoder.

What do you think about this?
Is this possible

Simon:
Hi,

I definitely think it's possible, but the development cost may be prohibitive.

For fun, look at this system that was just announced (relies on Xilinx FPGAs):

http://www.theinquirer.net/default.aspx?article=38324

Regards,
Simon.

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